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//lib/modules/2.6.32-754.el6.x86_64/build/include/asm-generic/pgtable.h
#ifndef _ASM_GENERIC_PGTABLE_H #define _ASM_GENERIC_PGTABLE_H #ifndef __ASSEMBLY__ #ifdef CONFIG_MMU #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS /* * Largely same as above, but only sets the access flags (dirty, * accessed, and writable). Furthermore, we know it always gets set * to a "more permissive" setting, which allows most architectures * to optimize this. We return whether the PTE actually changed, which * in turn instructs the caller to do things like update__mmu_cache. * This used to be done in the caller, but sparc needs minor faults to * force that call on sun4c so we changed this macro slightly */ #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ ({ \ int __changed = !pte_same(*(__ptep), __entry); \ if (__changed) { \ set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ flush_tlb_page(__vma, __address); \ } \ __changed; \ }) #endif #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS #ifdef CONFIG_TRANSPARENT_HUGEPAGE #define pmdp_set_access_flags(__vma, __address, __pmdp, __entry, __dirty) \ ({ \ int __changed = !pmd_same(*(__pmdp), __entry); \ VM_BUG_ON((__address) & ~HPAGE_PMD_MASK); \ if (__changed) { \ set_pmd_at((__vma)->vm_mm, __address, __pmdp, \ __entry); \ flush_tlb_range(__vma, __address, \ (__address) + HPAGE_PMD_SIZE); \ } \ __changed; \ }) #else /* CONFIG_TRANSPARENT_HUGEPAGE */ #define pmdp_set_access_flags(__vma, __address, __pmdp, __entry, __dirty) \ ({ BUG(); 0; }) #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #endif #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG #define ptep_test_and_clear_young(__vma, __address, __ptep) \ ({ \ pte_t __pte = *(__ptep); \ int r = 1; \ if (!pte_young(__pte)) \ r = 0; \ else \ set_pte_at((__vma)->vm_mm, (__address), \ (__ptep), pte_mkold(__pte)); \ r; \ }) #endif #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG #ifdef CONFIG_TRANSPARENT_HUGEPAGE #define pmdp_test_and_clear_young(__vma, __address, __pmdp) \ ({ \ pmd_t __pmd = *(__pmdp); \ int r = 1; \ if (!pmd_young(__pmd)) \ r = 0; \ else \ set_pmd_at((__vma)->vm_mm, (__address), \ (__pmdp), pmd_mkold(__pmd)); \ r; \ }) #else /* CONFIG_TRANSPARENT_HUGEPAGE */ #define pmdp_test_and_clear_young(__vma, __address, __pmdp) \ ({ BUG(); 0; }) #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #endif #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH #define ptep_clear_flush_young(__vma, __address, __ptep) \ ({ \ int __young; \ __young = ptep_test_and_clear_young(__vma, __address, __ptep); \ if (__young) \ flush_tlb_page(__vma, __address); \ __young; \ }) #endif #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH #ifdef CONFIG_TRANSPARENT_HUGEPAGE #define pmdp_clear_flush_young(__vma, __address, __pmdp) \ ({ \ int __young; \ VM_BUG_ON((__address) & ~HPAGE_PMD_MASK); \ __young = pmdp_test_and_clear_young(__vma, __address, __pmdp); \ if (__young) \ flush_tlb_range(__vma, __address, \ (__address) + HPAGE_PMD_SIZE); \ __young; \ }) #else /* CONFIG_TRANSPARENT_HUGEPAGE */ #define pmdp_clear_flush_young(__vma, __address, __pmdp) \ ({ BUG(); 0; }) #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #endif #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR #define ptep_get_and_clear(__mm, __address, __ptep) \ ({ \ pte_t __pte = *(__ptep); \ pte_clear((__mm), (__address), (__ptep)); \ __pte; \ }) #endif #ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR #ifdef CONFIG_TRANSPARENT_HUGEPAGE #define pmdp_get_and_clear(__mm, __address, __pmdp) \ ({ \ pmd_t __pmd = *(__pmdp); \ pmd_clear((__mm), (__address), (__pmdp)); \ __pmd; \ }) #else /* CONFIG_TRANSPARENT_HUGEPAGE */ #define pmdp_get_and_clear(__mm, __address, __pmdp) \ ({ BUG(); 0; }) #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #endif #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL #define ptep_get_and_clear_full(__mm, __address, __ptep, __full) \ ({ \ pte_t __pte; \ __pte = ptep_get_and_clear((__mm), (__address), (__ptep)); \ __pte; \ }) #endif /* * Some architectures may be able to avoid expensive synchronization * primitives when modifications are made to PTE's which are already * not present, or in the process of an address space destruction. */ #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL #define pte_clear_not_present_full(__mm, __address, __ptep, __full) \ do { \ pte_clear((__mm), (__address), (__ptep)); \ } while (0) #endif #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH #define ptep_clear_flush(__vma, __address, __ptep) \ ({ \ pte_t __pte; \ __pte = ptep_get_and_clear((__vma)->vm_mm, __address, __ptep); \ flush_tlb_page(__vma, __address); \ __pte; \ }) #endif #ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH #ifdef CONFIG_TRANSPARENT_HUGEPAGE #define pmdp_clear_flush(__vma, __address, __pmdp) \ ({ \ pmd_t __pmd; \ VM_BUG_ON((__address) & ~HPAGE_PMD_MASK); \ __pmd = pmdp_get_and_clear((__vma)->vm_mm, __address, __pmdp); \ flush_tlb_range(__vma, __address, (__address) + HPAGE_PMD_SIZE);\ __pmd; \ }) #else /* CONFIG_TRANSPARENT_HUGEPAGE */ #define pmdp_clear_flush(__vma, __address, __pmdp) \ ({ BUG(); 0; }) #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #endif #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT struct mm_struct; static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) { pte_t old_pte = *ptep; set_pte_at(mm, address, ptep, pte_wrprotect(old_pte)); } #endif #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT #ifdef CONFIG_TRANSPARENT_HUGEPAGE static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long address, pmd_t *pmdp) { pmd_t old_pmd = *pmdp; set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd)); } #else /* CONFIG_TRANSPARENT_HUGEPAGE */ #define pmdp_set_wrprotect(mm, address, pmdp) BUG() #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #endif #ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH #ifdef CONFIG_TRANSPARENT_HUGEPAGE #define pmdp_splitting_flush(__vma, __address, __pmdp) \ ({ \ pmd_t __pmd = pmd_mksplitting(*(__pmdp)); \ VM_BUG_ON((__address) & ~HPAGE_PMD_MASK); \ set_pmd_at((__vma)->vm_mm, __address, __pmdp, __pmd); \ /* tlb flush only to serialize against gup-fast */ \ flush_tlb_range(__vma, __address, (__address) + HPAGE_PMD_SIZE);\ }) #else /* CONFIG_TRANSPARENT_HUGEPAGE */ #define pmdp_splitting_flush(__vma, __address, __pmdp) BUG() #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #endif #ifndef __HAVE_ARCH_PTE_SAME #define pte_same(A,B) (pte_val(A) == pte_val(B)) #endif #ifndef __HAVE_ARCH_PMD_SAME #ifdef CONFIG_TRANSPARENT_HUGEPAGE #define pmd_same(A,B) (pmd_val(A) == pmd_val(B)) #else /* CONFIG_TRANSPARENT_HUGEPAGE */ #define pmd_same(A,B) ({ BUG(); 0; }) #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #endif #ifndef __HAVE_ARCH_PAGE_TEST_DIRTY #define page_test_dirty(page) (0) #endif #ifndef __HAVE_ARCH_PAGE_CLEAR_DIRTY #define page_clear_dirty(page) do { } while (0) #endif #ifndef __HAVE_ARCH_PAGE_TEST_DIRTY #define pte_maybe_dirty(pte) pte_dirty(pte) #else #define pte_maybe_dirty(pte) (1) #endif #ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG #define page_test_and_clear_young(page) (0) #endif #ifndef __HAVE_ARCH_PGD_OFFSET_GATE #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr) #endif #ifndef __HAVE_ARCH_MOVE_PTE #define move_pte(pte, prot, old_addr, new_addr) (pte) #endif #ifndef pgprot_noncached #define pgprot_noncached(prot) (prot) #endif #ifndef pgprot_writecombine #define pgprot_writecombine pgprot_noncached #endif /* * When walking page tables, get the address of the next boundary, * or the end address of the range if that comes earlier. Although no * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout. */ #define pgd_addr_end(addr, end) \ ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ (__boundary - 1 < (end) - 1)? __boundary: (end); \ }) #ifndef pud_addr_end #define pud_addr_end(addr, end) \ ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \ (__boundary - 1 < (end) - 1)? __boundary: (end); \ }) #endif #ifndef pmd_addr_end #define pmd_addr_end(addr, end) \ ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \ (__boundary - 1 < (end) - 1)? __boundary: (end); \ }) #endif /* * When walking page tables, we usually want to skip any p?d_none entries; * and any p?d_bad entries - reporting the error before resetting to none. * Do the tests inline, but report and clear the bad entry in mm/memory.c. */ void pgd_clear_bad(pgd_t *); void pud_clear_bad(pud_t *); void pmd_clear_bad(pmd_t *); static inline int pgd_none_or_clear_bad(pgd_t *pgd) { if (pgd_none(*pgd)) return 1; if (unlikely(pgd_bad(*pgd))) { pgd_clear_bad(pgd); return 1; } return 0; } static inline int pud_none_or_clear_bad(pud_t *pud) { if (pud_none(*pud)) return 1; if (unlikely(pud_bad(*pud))) { pud_clear_bad(pud); return 1; } return 0; } static inline int pmd_none_or_clear_bad(pmd_t *pmd) { if (pmd_none(*pmd)) return 1; if (unlikely(pmd_bad(*pmd))) { pmd_clear_bad(pmd); return 1; } return 0; } static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { /* * Get the current pte state, but zero it out to make it * non-present, preventing the hardware from asynchronously * updating it. */ return ptep_get_and_clear(mm, addr, ptep); } static inline void __ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) { /* * The pte is non-present, so there's no hardware state to * preserve. */ #ifdef CONFIG_PARAVIRT if (likely(!paravirt_enabled())) native_set_pte_at(mm, addr, ptep, pte); else #endif set_pte_at(mm, addr, ptep, pte); } #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION /* * Start a pte protection read-modify-write transaction, which * protects against asynchronous hardware modifications to the pte. * The intention is not to prevent the hardware from making pte * updates, but to prevent any updates it may make from being lost. * * This does not protect against other software modifications of the * pte; the appropriate pte lock must be held over the transation. * * Note that this interface is intended to be batchable, meaning that * ptep_modify_prot_commit may not actually update the pte, but merely * queue the update to be done at some later time. The update must be * actually committed before the pte lock is released, however. */ static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { return __ptep_modify_prot_start(mm, addr, ptep); } /* * Commit an update to a pte, leaving any hardware-controlled bits in * the PTE unmodified. */ static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) { __ptep_modify_prot_commit(mm, addr, ptep, pte); } #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */ #endif /* CONFIG_MMU */ /* * A facility to provide lazy MMU batching. This allows PTE updates and * page invalidations to be delayed until a call to leave lazy MMU mode * is issued. Some architectures may benefit from doing this, and it is * beneficial for both shadow and direct mode hypervisors, which may batch * the PTE updates which happen during this window. Note that using this * interface requires that read hazards be removed from the code. A read * hazard could result in the direct mode hypervisor case, since the actual * write to the page tables may not yet have taken place, so reads though * a raw PTE pointer after it has been modified are not guaranteed to be * up to date. This mode can only be entered and left under the protection of * the page table locks for all page tables which may be modified. In the UP * case, this is required so that preemption is disabled, and in the SMP case, * it must synchronize the delayed page table writes properly on other CPUs. */ #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE #define arch_enter_lazy_mmu_mode() do {} while (0) #define arch_leave_lazy_mmu_mode() do {} while (0) #define arch_flush_lazy_mmu_mode() do {} while (0) #endif /* * A facility to provide batching of the reload of page tables and * other process state with the actual context switch code for * paravirtualized guests. By convention, only one of the batched * update (lazy) modes (CPU, MMU) should be active at any given time, * entry should never be nested, and entry and exits should always be * paired. This is for sanity of maintaining and reasoning about the * kernel code. In this case, the exit (end of the context switch) is * in architecture-specific code, and so doesn't need a generic * definition. */ #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH #define arch_start_context_switch(prev) do {} while (0) #endif #ifndef __HAVE_PFNMAP_TRACKING /* * Interface that can be used by architecture code to keep track of * memory type of pfn mappings (remap_pfn_range, vm_insert_pfn) * * track_pfn_vma_new is called when a _new_ pfn mapping is being established * for physical range indicated by pfn and size. */ static inline int track_pfn_vma_new(struct vm_area_struct *vma, pgprot_t *prot, unsigned long pfn, unsigned long size) { return 0; } /* * Interface that can be used by architecture code to keep track of * memory type of pfn mappings (remap_pfn_range, vm_insert_pfn) * * track_pfn_vma_copy is called when vma that is covering the pfnmap gets * copied through copy_page_range(). */ static inline int track_pfn_vma_copy(struct vm_area_struct *vma) { return 0; } /* * Interface that can be used by architecture code to keep track of * memory type of pfn mappings (remap_pfn_range, vm_insert_pfn) * * untrack_pfn_vma is called while unmapping a pfnmap for a region. * untrack can be called for a specific region indicated by pfn and size or * can be for the entire vma (in which case size can be zero). */ static inline void untrack_pfn_vma(struct vm_area_struct *vma, unsigned long pfn, unsigned long size) { } #else extern int track_pfn_vma_new(struct vm_area_struct *vma, pgprot_t *prot, unsigned long pfn, unsigned long size); extern int track_pfn_vma_copy(struct vm_area_struct *vma); extern void untrack_pfn_vma(struct vm_area_struct *vma, unsigned long pfn, unsigned long size); #endif #ifdef __HAVE_COLOR_ZERO_PAGE static inline int is_zero_pfn(unsigned long pfn) { extern unsigned long zero_pfn; unsigned long offset_from_zero_pfn = pfn - zero_pfn; return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT); } static inline unsigned long my_zero_pfn(unsigned long addr) { return page_to_pfn(ZERO_PAGE(addr)); } #else static inline int is_zero_pfn(unsigned long pfn) { extern unsigned long zero_pfn; return pfn == zero_pfn; } static inline unsigned long my_zero_pfn(unsigned long addr) { extern unsigned long zero_pfn; return zero_pfn; } #endif #ifndef CONFIG_TRANSPARENT_HUGEPAGE #define pmd_trans_huge(pmd) 0 #define pmd_trans_splitting(pmd) (0) #ifndef __HAVE_ARCH_PMD_WRITE #define pmd_write(pmd) ({ BUG(); 0; }) #endif /* __HAVE_ARCH_PMD_WRITE */ #endif #ifndef __HAVE_ARCH_READ_PMD_ATOMIC static inline pmd_t read_pmd_atomic(pmd_t *pmdp) { /* * Depend on compiler for an atomic pmd read. NOTE: this is * only going to work, if the pmdval_t isn't larger than * an unsigned long. */ return *pmdp; } #endif /* __HAVE_ARCH_READ_PMD */ /* * This function is meant to be used by sites walking pagetables with * the mmap_sem hold in read mode to protect against MADV_DONTNEED and * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd * into a null pmd and the transhuge page fault can convert a null pmd * into an hugepmd or into a regular pmd (if the hugepage allocation * fails). While holding the mmap_sem in read mode the pmd becomes * stable and stops changing under us only if it's not null and not a * transhuge pmd. When those races occurs and this function makes a * difference vs the standard pmd_none_or_clear_bad, the result is * undefined so behaving like if the pmd was none is safe (because it * can return none anyway). The compiler level barrier() is critically * important to compute the two checks atomically on the same pmdval. * * For 32bit kernels with a 64bit large pmd_t this automatically takes * care of reading the pmd atomically to avoid SMP race conditions * against pmd_populate() when the mmap_sem is hold for reading by the * caller (a special atomic read not done by "gcc" as in the generic * version above, is also needed when THP is disabled because the page * fault can populate the pmd from under us). */ static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd) { pmd_t pmdval = read_pmd_atomic(pmd); /* * The barrier will stabilize the pmdval in a register or on * the stack so that it will stop changing under the code. */ #ifdef CONFIG_TRANSPARENT_HUGEPAGE barrier(); #endif if (pmd_none(pmdval)) return 1; if (unlikely(pmd_bad(pmdval))) { if (!pmd_trans_huge(pmdval)) pmd_clear_bad(pmd); return 1; } return 0; } /* * This is a noop if Transparent Hugepage Support is not built into * the kernel. Otherwise it is equivalent to * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in * places that already verified the pmd is not none and they want to * walk ptes while holding the mmap sem in read mode (write mode don't * need this). If THP is not enabled, the pmd can't go away under the * code even if MADV_DONTNEED runs, but if THP is enabled we need to * run a pmd_trans_unstable before walking the ptes after * split_huge_page_pmd returns (because it may have run when the pmd * become null, but then a page fault can map in a THP and not a * regular page). */ static inline int pmd_trans_unstable(pmd_t *pmd) { #ifdef CONFIG_TRANSPARENT_HUGEPAGE return pmd_none_or_trans_huge_or_clear_bad(pmd); #else return 0; #endif } #endif /* !__ASSEMBLY__ */ #endif /* _ASM_GENERIC_PGTABLE_H */